“Thermal Profile Variation and PCB Reliability” by Jigar Patel, Senior Application Engineer, ZESTRON, to be presented at APEX 2016

Manassas, VA – February 24, 2016 ZESTRON, the global leading provider of high precision cleaning products, services and training solutions in the electronics manufacturing and semiconductor industries, is pleased to announce that Jigar Patel, M.S.Ch.E., Senior Application Engineer, ZESTRON, will present “Thermal Profile Variation and PCB Reliability” during the Flux Reliability II session on Thursday, March 17th, at APEX 2016.

When designing PCBs, the manufacturing process is developed and refined. Critical to the quality of the solder joint is an effective thermal cycle. As PCB surface density and component mass increases, is the recommended thermal profile sufficient to produce quality solder bonds and fully volatilize flux residues? Flux residues remaining on a PCB surface and/or component may lead to failure mechanisms including leakage current, electrochemical migration and dendritic growth. Recognizing that reflow optimization is increasingly challenging as component density and thermal mass variation increases on the electronic assembly, surface temperature variation on the PCB is inevitable.  

This study was conducted to assess the effect of thermal profile variations on flux residue formation. It was limited to No-Clean solder pastes as this paste may or may not be cleaned. Cleanliness assessment results from ionic contamination and SIR analysis will also be reviewed.

For more information about ZESTRON’s process solutions and services, please visit booth #2624.  Our team stands ready to provide comprehensive solutions to your cleaning needs.